1. Field of the Invention
The present invention relates to a semiconductor device comprising a high-speed static induction transistor, and a method of manufacturing such a semiconductor device.
2. Description of the Prior Art
Known field-effect transistors include junction and MIS (Metal Insulator Semiconductor) field-effect transistors. The junction and MIS field-effect transistors exhibit saturated current vs. voltage characteristics in which the drain current is gradually saturated as the drain voltage increases.
Static induction field-effect transistors (hereinafter also referred to as "SIT") whose drain current continues to increase as the drain voltage increases are disclosed in Japanese patent publication No. 52-6076 entitled "Field-effect transistor" and Japanese patent publication No. 52-17720 entitled "Field-effect transistor."
The SITs are better than field-effect transistors (hereinafter also referred to as "FET") as they are characterized by a large power-handling capability, a high dielectric strength, a large current-handling capacity, a low distortion, a low noise level, low power consumption, and high-speed operation. The SITs are also much better than conventional bipolar transistors and FETs with respect to temperature characteristics.
Since the SITs have proven highly satisfactory as discrete elements and IC components, they are finding growing use in various new applications.
In the case where a logic gate is to be constructed of SITs, normally-off SITs which do not pass a current when no bias is applied to their gates are suitable for use as such logic gate elements. Normally-off SITs with pn-junction gates undergo the injection of minority carriers as the gates are successively biased. Accumulation of such minority carriers makes the normally-off SITs difficult to operate at high speed.